The subject invention is directed generally to computer data tape drives, and is directed more particularly to adjustable write equalization for computer data tape drives.
Computer data tape drives have been utilized for many years in the computer environment for "secondary" storage by which computer data on "primary" data storage, such as magnetic disk systems, could be periodically backed up or transported.
In the continuing quest for higher data densities, various coding techniques, recording techniques, and writing techniques have been developed over the years. Such developments have included write equalization for NRZI (non-return to zero, invert on ones) recording. Pursuant to NRZI recording, a binary 1 is written to tape pursuant to a transition in the write current level which causes a flux reversal, while a binary 0 is "written" by no transition in the write current level. The premise of NRZI is that data bits are supposed to be written at equally spaced intervals on tape, physically and in time.
As is well known, NRZI recording is typically implemented with run length limited (RLL) coding which limits the number of 0's that can occur in succession. Run length limited coding is generally depicted as RLL (d,k) coding, wherein k represents the maximum number of successive 0's permitted and d represents the minimum number of 0's between 1's and can have a value of 0. Thus, RLL codes having values of k that are relatively larger than d will have large transition spacing ratios (i.e., the ratio between the shortest and longest spaces between transitions). As is well known, relatively large transition ratios create various problems especially for the read circuitry, including for example saturation of magneto resistive read elements due to high values of low frequency flux.
A significant approach to solving the foregoing problems is the addition of equalization pulses to the write current during occurrences of strings of 0's, as described in "Write equalization in high-linear-density magnetic recording," Schneider, IBM J. RES. DEVELOP., Vol. 29, No. 6, November 1985, pages 563-568; "WRITE EQUALIZATION FOR GENERALIZED (d,k) CODES," Schneider, IEEE TRANSACTIONS ON MAGNETICS, Vol. 24, No. 6, pages 2533-2535, 1988; and the QIC-1350 Development Standard of the Quarter-Inch Cartridge Drive Standards, Inc. for SERIAL RECORDED MAGNETIC TAPE CARTRIDGE FOR INFORMATION INTERCHANGE.
The QIC-1350 Development Standard specifies that for every 0 other than the first 0 following a 1, a write equalization pulse is inserted. The width t.sub.w of the equalization pulse is specified to be 1/6 of the minimum nominal transition period t.sub.c (.+-.5%), where the transition period is the time between two adjacent flux transitions at the maximum recording density (i.e., the minimum time between the flux transitions as allowed by the particular RLL coding utilized). The QIC-1350 Development Standard utilizes RLL (1,7) coding, and therefore the width of the equalization pulse is 1/3 of the nominal bit interval since the minimum time between flux transitions includes 2 bit intervals. In particular, the equalization pulse width is 35.8 nanoseconds.
Typically, the write equalization pulses have been produced by inserting pulses of the specified width in the write current. However, as a result of non-linear distortions due to inadequate write current or head field rise times, demagnetization field effects from a prior transition, spacing loss, as well as other factors such as write head, write circuit, and tape variations, the equalization pulses recorded on tape are actually narrower than the specified pulse width, and the suppression of low frequency components recorded on tape as specified by the write equalization specification is not being achieved. Tapes having insufficiently suppressed low frequency components may be unreadable since the effective resolution of the read head is inadequate.
Circuitry for producing the write equalization pulses are commonly implemented with integrated circuits, and factors that affect the accuracy of the narrow equalization pulse width include processing variations as well as voltage and temperature effects. As a result of these factors, the equalization pulse width produced by a particular circuit can easily be outside the tolerances specified for the equalization pulse width.